| PART |
Description |
Maker |
| LV5609LP |
Vertical Clock Driver for CCD
|
ON Semiconductor
|
| AI1003 |
Vertical Clock Driver for Camera System
|
A1 PROs co., Ltd.
|
| 100311QC 100311 100311QI 100311QCX 100311QIX |
Nine Distributed-Output Clock Driver 100K SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
Low Skew 1:9 Differential Clock Driver
From old datasheet system
|
Fairchild Semiconductor, Corp.
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
| MAX9310 MAX9310EUPT |
1:5 Clock Driver with Selectable LVPECL Inputs and LVDS Outputs LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
|
MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
|
| CY2SSTV857 CY2SSTV857ZXI-27 CY2SSTV857ZXI-27T CY2S |
Differential Clock Buffer/Driver DDR333/PC2700-Compliant SSTV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
|
Cypress Semiconductor, Corp.
|
| IDT74FCT388915T IDT74FCT388915T100 IDT74FCT388915T |
3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE) FCT SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), CQCC28
3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE) FCT SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28
3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE) FCT SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO28
CAP 6.8UF 6V 10% TANT SOLID A-CASE HERMETIC T&R M-MIL-PRF-39003/01
|
INTEGRATED DEVICE TECHNOLOGY INC
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
| SY100E111JYTR |
1:9 DIFFERENTIAL CLOCK DRIVER WITH ENABLE 100E SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
|
Micrel Semiconductor, Inc.
|
| NBSG11 NBSG111 NBSG11BA NBSG53A NBSG53ABA NBSG53AM |
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
2.5 V/3.3 V SiGe Differential Smart Gate with Output Level Select
|
ON Semiconductor
|
| CXD1267AN D1267 |
CCD Vertical Clock Driver
From old datasheet system
|
SONY[Sony Corporation]
http://
|
| GTLP6C817 GTLP6C817MTCX |
Low Drive GTLP-to-LVTTL 1:6 Clock Driver; Package: TSSOP; No of Pins: 24; Container: Tape & Reel GTLP SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
Low Drive GTLP/LVTTL 1:6 Clock Driver
|
Fairchild Semiconductor, Corp.
|
